A State of Art Survey for OS Performance Improvement
DOI:
https://doi.org/10.25271/sjuoz.2018.6.3.516Keywords:
OS performance, thread, multiprocessor, transaction memoryAbstract
Through the huge growth of heavy computing applications which require a high level of performance, it is observed that the interest of monitoring operating system performance has also demanded to be grown widely. In the past several years since OS performance has become a critical issue, many research studies have been produced to investigate and evaluate the stability status of OSs performance. This paper presents a survey of the most important and state of the art approaches and models to be used for performance measurement and evaluation. Furthermore, the research marks the capabilities of the performance-improvement of different operating systems using multiple metrics. The selection of metrics which will be used for monitoring the performance depends on monitoring goals and performance requirements. Many previous works related to this subject have been addressed, explained in details, and compared to highlight the top important features that will very beneficial to be depended for the best approach selection.
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Connors, T. A., & Qasem, A. (2017). Automatically Selecting Profitable Thread Block Sizes for Accelerated Kernels. 2017 IEEE 19th International Conference on High Performance Computing and Communications; IEEE 15th International Conference on Smart City; IEEE 3rd International Conference on Data Science and Systems (HPCC/SmartCity/DSS), 442–449.
Herlihy, M., Eliot, J., & Moss, B. (1993). Transactional Memory: Architectural Support For Lock-free Data Structures. Proceedings of the 20th Annual International Symposium on Computer Architecture, 289–300.
Jarp, S., Jurga, R., & Nowak, A. (2008). Perfmon2: A leap forward in performance monitoring. Journal of Physics: Conference Series, 119(4), 1–6.
Ju, M., Jung, H., & Che, H. (2015). A Performance Analysis Methodology for Multicore, Multithreaded Processors. IEEE TRANSACTIONS ON COMPUTERS, 63(2), 276–289.
Li, J., Li, M., Xue, C. J., Ouyang, Y., & Shen, F. (2017). Thread criticality assisted replication and migration for chip multiprocessor caches. IEEE Transactions on Computers, 66(10), 1747–1762.
Lu, K., Yan, C., Zhou, H., Zhou, D., & Zeng, X. (2017). A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. 2017 IEEE International Symposium on Parallel and Distributed Processing with Applications and 2017 IEEE International Conference on Ubiquitous Computing and Communications (ISPA/IUCC), 814–821.
Monitor (synchronization). (2018). In Wikipedia. Retrieved from https://en.wikipedia.org/w/index.php?title=Monitor_(synchronization)&oldid=860252631
Musiphil. (n.d.). Monitor. Retrieved from https://en.wikipedia.org/wiki/Monitor_(synchronization)
Pandey, R., & Sahu, A. (2018). Efficient Mapping of Multi-threaded Applications onto 3D Stacked Chip-Multiprocessor. Proceedings - 2017 IEEE 19th Intl Conference on High Performance Computing and Communications, HPCC 2017, IEEE 15th Intl Conference on Smart City, IEEE 3rd Intl Conference on Data Science and Systems, 324–331.
Petrucci, V., Loques, O., Mossé, D., Melhem, R., Gazala, N. A., & Gobriel, S. (2015a). Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems. ACM Transactions on Embedded Computing Systems, 14(1), 1–26.
Petrucci, V., Loques, O., Mossé, D., Melhem, R., Gazala, N. A., & Gobriel, S. (2015b). Energy-Efficient Thread Assignment Optimization for Heterogeneous Multicore Systems. ACM Trans. Embed. Comput. Syst., 14(1), 15:1--15:26.
Rashid, Z. N., Sharif, K. H., & Zeebaree, S. (2018). Client / Servers Clustering Effects on CPU Execution-Time , CPU Usage and CPU Idle Depending on Activities of Parallel-Processing- Technique Operations “. INTERNATIONAL JOURNAL OF SCIENTIFIC & TECHNOLOGY RESEARCH, 7(8), 106–111.
Saez, J. C., Pousa, A., Rodriguez-Rodriguez, R., Castro, F., & Prieto-Matias, M. (2017). PMCTrack: Delivering performance monitoring counter support to the OS scheduler. Computer Journal, 60(1), 60–85.
Salamanca, J, Amaral, J. N., & Araujo, G. (2018). Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation. IEEE Transactions on Parallel and Distributed Systems, 29(2), 466–480.
Salamanca, Juan, Amaral, J. N., & Araujo, G. (2018). Using Hardware-Transactional-Memory Support to Implement Thread-Level Speculation. IEEE Transactions on Parallel and Distributed Systems, 29(2), 466–480.
Selfa, V, Sahuquillo, J., Petit, S., & Gómez, M. E. (2017). A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches. IEEE Transactions on Parallel and Distributed Systems, 28(11), 3021–3032.
Selfa, Vicent, Sahuquillo, J., Petit, S., & Gómez, M. E. (2017). A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches. IEEE Transactions on Parallel and Distributed Systems, 28(11), 3021–3032.
Seo, S., Amer, A., Balaji, P., Bordage, C., Bosilca, G., Brooks, A., … Beckman, P. (2018). Argobots: A Lightweight Low-Level Threading and Tasking Framework. IEEE Transactions on Parallel and Distributed Systems, 29(3), 512–526.
Shim, K. S., Lis, M., Khan, O., & Devadas, S. (2014). Judicious Thread Migration When Accessing Distributed Shared Caches. IEEE Computer Architecture Letters, 13(1), 53–56.
Zeebaree, S. R. M., & Jacksi, K. (2015). Effects of Processes Forcing on CPU and Total Execution-Time Using Multiprocessor Shared Memory System. INTERNATIONAL JOURNAL OF COMPUTER ENGINEERING IN RESEARCH TRENDS, 2(4), 275–279.
Zhou, N, Delaval, G., Robu, B., Rutten, É., & Méhaut, J. (2016). Autonomic Parallelism and Thread Mapping Control on Software Transactional Memory. In 2016 IEEE International Conference on Autonomic Computing (ICAC) (pp. 189–198).
Zhou, Naweiluo, Delaval, G., Robu, B., Rutten, E., & Mehaut, J. F. (2016). Autonomic parallelism and thread mapping control on software transactional memory. In Proceedings - 2016 IEEE International Conference on Autonomic Computing, ICAC 2016 (pp. 189–198).
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Published
2018-09-30
How to Cite
Haji, L. M., Zeebaree, S. R., Jacksi, K., & Zeebaree, D. Q. (2018). A State of Art Survey for OS Performance Improvement. Science Journal of University of Zakho, 6(3), 118–123. https://doi.org/10.25271/sjuoz.2018.6.3.516
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Science Journal of University of Zakho
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